Poor Man's Digital PGA

Playing around with the MSGEQ7 chips it was readily apparent that the audio input level was critical to its graphic equalizer display. There have been many analog AGC (Automatic Gain Control) designs used over the years. Some designs using an opamp and a FET can be constructed but can be difficult to get right for students without an oscilloscope.

With an eye to reproducible circuits for readers, I was looking for a single-ended opamp design that was digitally controlled. Digital circuits tend to be easier to manage with the minimum of equipment. So I got to wondering if I could manage this with the use of the LM358 (or the LV rail-to-rail part MC33202).

I wondered if a Digital PGA (Programmable Gain Amplifier) could be constructed with a minimum of parts. Figure 1 shows a typical AC coupled non-inverting amplifier design. Because it is single ended, it needs the voltage divider consisting of R1 and R2. If VCC is 5 V, then the junction between them will be VCC/2 or 2.5 V.  C1 AC couples the signal into the non-inverting input of IC1. The feedback circuit is however a bit unusual because the gain for DC and AC signals differ.

Figure 1. AC Coupled Non-Inverting Amplifier

Those who know/remember their opamp theory, know that a non-inverting amplifier's gain is set by the ratio:

Av = (R5/R3) + 1

But in this circuit the capacitor C2 blocks DC current. The feedback current through R5 is so small, it behaves as if the output was wired directly to the inverting input. The net effect is that the Vout = V- = V+ for DC. The resistor R3 has no DC path to ground and as a result, can have no DC effect on the output.

Yet, the AC gain is however, still affected by R3. So the AC gain of the Figure 1 circuit is indeed:

Av = (500k/500k) + 1 = 2

It is well known that either R5 or R3 has to change to affect a change in this gain calculation. The good thing about this circuit is that the DC gain is not affected by resistance changes as long as R5 remains reasonable.

To change the AC gain, we could change out R5 using some FET switches but this proves inconvenient. Likewise R3 is inconvenient for switching resistors in and out. But if you stare at Figure 1 long enough, you have to start asking yourself "wouldn't it be nice if we could move R3 to ground?" Then you could easily add or subtract resistances to change gain. It turns out that we can!

Figure 2 shows the circuit modified so that R3 has one grounded leg and the capacitor C2 is moved above it. In this case R3 and C2 are simply in series and can be moved around.

Figure 2. AVR Controlled PGA

With R3 grounded, we can easily add resistances in parallel with it. R4 if placed in parallel with R3, is equivalent to:

R3 || R4 ~= 83k

This change alters the gain:

Av = (500k/83k)+1 ~= 7

So with the simple act of adding in R4 in parallel with R3, we've digitally changed the AC gain from 2 to 7. R4, R6 and R7 were chosen to be 10% tolerance resistances giving the following selection of gains:

Value	R3	Gain	dBV
0	500,000	2.0	6.0
1	83,333	7.0	16.9
2	42,962	12.6	22.0
3	30,051	17.6	24.9
4	21,073	24.7	27.9
5	17,405	29.7	29.5
6	14,549	35.4	31.0
7	12,701	40.4	32.1

With all resistors enabled by the AVR device, the maximum AC gain is about 32 dBV (40). With none of the added resistors connected in, the gain reduces to a minimum of 2 (6 dBV).

AVR Digital Control

The digital controls coming from the ATmega328P (Figure 2) must set the outputs of PD5, PB6 and PB7 along these lines:

1. To enable a resistor, the port must be configured as an output port and have the level set to zero (low).
2. To disable a resistor, the port must be configured as an input port and have the pull-up resistor disabled (thus achieving a tri-state condition).

Note that a tri-stated AVR input here is never left floating. It will assume the potential of the high side of R3, which will be ground effectively. R3 never switches out of the circuit.

The 'mega ports in Figure 2 were chosen to avoid some otherwise usable ports. You can of course change the ports to meet your own needs.

Function Generator Test

Figure 3 shows the scope traces of the 5 kHz function generator (channel 2) and the IC1A output in channel 1. Here it can be seen that the gain is 2.

Figure 3. R4, R6 and R7 disconnected (off), gain of 2

Figure 4 shows R4 grounded to enable it in parallel with R3. The gain is nearly 7 (422mV/64.3mV=6.56).

Figure 4. R4 || R3, gain near 7

Watch the gain change between four settings, driven by an ATmega328P:

  https://youtu.be/iqPBaHtLFI0

Thanks for reading!